 No.20521
Tafoid Administrator
Sep 9, 2022, 21:32
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Is this divisor for the XTAL a guess, or do you have any PCB snapshots or schematics where the tracing of the speed line would indicate the proper divisor(s)? |
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 No.20529
mdqgames Tester
Sep 10, 2022, 16:14
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An electronics technician who worked a long time with these PCBs gave me the tip, since then I've been using this one in my builds for this driver and everything works as it should. But I don't have any physical proof of measurement to send, sorry. |
 No.21058
AJR Developer
Feb 4, 2023, 19:42
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The PCB design is ASIC-based, and MAME's H8 instruction timings are considerably inaccurate despite appearing to be cycle-perfect. (The core assumes all memory accesses complete in 1 system clock cycle when not even internal RAM is that fast on most models, and the external bus can be configured for 8-bit data with additional waitstates, which I strongly suspect is the case here. It doesn't help that these Subsino CPUs also have undumped internal ROMs.) |
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No.21059
Haze Senior Tester
Feb 6, 2023, 10:31
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do they really have an internal ROM, or are they recycled parts operating in external mode? i'd expect more code to be missing if they ran in internal mode? |
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No.21082
AJR Developer
Feb 15, 2023, 15:05
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This is an old guess which I believe is tempting but wrong. It's true that there are MCUs that had to be ordered with an internal mask ROM that was practically never enabled in practice (e.g. X0-006, used by several games in seta.cpp, which was confirmed to have internal ROM through a decap). There are, however, other MCUs in which the internal ROM is suspected or proved to be used just for reset and IRQ vectors. In this case, the "rts -> rte" patches are very suspicious, suggesting that the real IRQ handlers exist in ROM and merely dispatch to the external vectors as normal subroutines, as is loading the ROM twice at 0x000000 and 0x080000, with the code using the upper offsets almost exclusively. The H8/3044 in the closely related lastfght.cpp hardware is confirmed to be running with the mask ROM enabled. I suspect what it does here is not just wrap the IRQ handlers, but initialize a few SFRs and perhaps even checksum the external ROM. The HD641780X-based games in subsino2.cpp likely have something similar going on, with the on-chip MMU banking out most of the internal ROM once the initialization is done. |
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No.21133
mdqgames Tester
Mar 1, 2023, 14:44
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Also,, no one has been able to map the queenbee set's pay button, and the sound remains anyone's guess. |